I'm using parallel output on a Taijiuino Due (Due clone with more pins) and

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1

I’m using parallel output on a Taijiuino Due (Due clone with more pins) and I noticed a difference in the parallel output doc for PORTA and PORTB.

Doc says the pins are in this order :
WS2811_PORTB: 90,91,92,93,94,95,96,97
WS2811_PORTA: 69,68,61,60,59,100,58,31

However when tested the pins are apparently in this order :
WS2811_PORTB: 92, 93, 94, 95, 96, 97, 90, 91
WS2811_PORTA: 69, 68, 58, 59, 60, 100, 61, 31

I declare the leds like this, using a single array :
FastLED.addLeds<WS2811_PORTB,8>(leds,0, NUM_LEDS_PER_LONG);
FastLED.addLeds<WS2811_PORTA,8>(leds,8 * NUM_LEDS_PER_LONG, NUM_LEDS_PER_LONG);

It’s not a problem really, just thought I’d mention it. Thanks again for this wonderful feature :ok_hand:

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The higher number pin/port mappings are from the digix, which was another due clone with more pins. Sounds like the folks who did the taijuino laid their pins out differently.